6510 Illegal Instruction Set

Related Topics

Instructions Set

  • ANC AND #immediate, copy accu-bit 7 to carry
  • ANE Instable!
  • ARR AND #immediate, ROR accu
  • ASR AND #immediate, LSR accu
  • DCP DEC memory, CMP memory
  • ISB INC memory, SBC memory
  • JAM Locks up machine
  • LAE Instable!
  • LAX LDA memory, TAX
  • LXA Instable!
  • NOP No operation
  • RLA ROL memory, AND memory
  • RRA ROR memory, ADC memory
  • SAX Accu AND X-Register into memory
  • SBC Subtract memory from accumulator with borrow
  • SBX Accu AND X-Register, subtract operand, result into X-Register
  • SHA Instable!
  • SHS Instable!
  • SHX Instable!
  • SHY Instable!
  • SLO ASL memory, ORA memory
  • SRE LSR memory, EOR memory